This invention relates to the realization of non-binary or multi-valued digital logic devices that are able to execute arithmetic operations. More specifically it relates to ternary and multi-valued digital multipliers.
Digital computers and computer circuits currently work pre-dominantly on the principles of binary logic. Basic calculations, such as addition and multiplication are core to many useful applications. In many cases the ability to execute these basic calculations is implemented in dedicated binary logic adders and multipliers.
Many practical and theoretical computing applications are under time constraints to execute these calculations in the shortest time possible. One constraint may be that trillions of additions or multiplications have to be executed to arrive at some desired result within a reasonable time-frame. Another constraint may be the allowed time to process a digital signal sample to achieve real-time signal processing.
There are several ways to speed up calculations. There is the physical way wherein circuits are realized that enables individual instructions to execute faster. Another way to speed up calculations is to rearrange the individual logic instructions, for instance by trying to execute as many instructions at the same time (or in parallel) rather than consecutively.
The major constraint in all digital calculations is the occurrence of carry digits in addition and multiplication and the borrow digits in subtractions and division. Avoidance or limitation of occurrence of carry digits in additions and multiplications is at the core of many approaches to speed up theses calculations.
Another approach is to avoid serial calculations. In these serial calculations, a new calculation has to wait for the result of a previous one, creating a potential bottleneck.
The subject is known to those skilled in the art as computer arithmetic.
It is known that applying certain binary digital operations may speed up total execution. An example is the shift-and-add process in multi-binary digit multiplication.